Estimating the distribution of fault latency in a digital processor
Erik L. Ellis, Ricky W. Butler · NASA Technical Reports Server (NASA) · 1987
Presented is a statistical approach to measuring fault latency in a digital processor. The method relies on the use of physical fault injection where the duration of the fault injection can be controlled. Although a specific fault's latency period is never directly measured, the method indirectly determines the distribution of fault latency.