Hardware Acceleration of Dash Mining Using Dynamic Partial Reconfiguration on the ZYNQ Board
Mohamed H. Abdulmonem, Jihad EssamEddeen, Michael H. Zakhari, Sayed Hanafi, Hassan Mostafa · 2020
Dynamic Partial Reconfiguration (DPR) enables reconfiguration of FPGA parts at runtime to provide flexible hardware accelerators with advantages in area, power, reconfiguration time, and memory utilization. In this paper, a design employing DPR technology is proposed to accelerate the mining of the cryptocurrency DASH using the PCAP controller on the ZYNQ 702 Evaluation Board. The DPR design remarkably reduces the area needed for implementing the hash of the mining process of dash on the ZYNQ 702 board.