Hardware-Based FLUSH+RELOAD Attack on Armv8 System via ACP
Lee Heemin, Sungyeong Jang, Han-Yee Kim, Taeweon Suh · 2021
Cache side-channel attacks have been getting remarked as it threatens the information security of the multitenant systems. Among them, the FLUSH+RELOAD attack is one of the high-accuracy and high-resolution cache side-channel attacks. However, there have been few works targeting Arm architecture due to its architectural differences from x86 processors such as accessibility of cache flush instruction. In this paper, we design hardware that allows unprivileged cache invalidation on Arm processor through ACP. By utilizing the developed IP, we demonstrate a FLUSH+RELOAD attack on T table-based AES in unprivileged user mode. Our suggestion shows better performance than previous studies using cache flush instruction.