A SIGNATURE REGISTER OF A BIST TO DETECT STUCK-AT-FAULTS IN COMBINATIONAL LOGIC ICS
Widianto Widianto · UMM Institutional Repository (University of Maine at Machias) · 2021
A specific functionality of combinational logic ICs (integrated circuits) may become errors caused by occurring stuck-at-faults at its inputs and output logic gates. The faults may be detected by a signature register of a BIST (built-in self test). A circuit simulation of it is designed by Verilog. Moreover, as a CUT (circuit under test) is a combinational IC of XXX855 manufactured by Nexperia Semiconductor Company. A testability of the circuit is simulated using QuestaSim simulator. Simulation results show that the circuit may detect the faults occurring in the CUT.