A Fault Detection Scheme for Reversible Circuits using -Ve Control k-CNOT Based Circuit
Mousum Handique, Jantindra Kumar Deka, Santosh Biswas · 2020
The reversible logic circuit is a prominent research area for its low-power design, and also quantum computing. The development of synthesis and optimization is a well-known problem in the reversible circuits. For ensuring the high reliability and integrity performance of these circuits, the proper testing technique will be required to detect and locate the faults. In this paper, we consider the problem of reversible circuit testing, specifically targeting the fault detection for the missing-gate fault model in the k-CNOT based reversible circuit. It has been shown that n number of test vectors is sufficient for the detection of all single missing-gate faults (SMGFs), repeated-gate faults (RGFs), and partial missing-gate faults (PMGFs) of the proposed fault detection scheme in a reversible circuit with n inputs. Finally, we provide our experimental results based on several benchmark circuits and also show the comparative analysis with existing methods.