Flexible and Efficient sharing of High Performance Hardware Accelerators in a Safe, Secure, Virtualized System
Sriramakrishnan Govindarajan, Kedar Chitnis, Mihir Mody, Greg Shurtz, Sujith Shivalingappa, Taehun Kim · 2020
Safety, security and virtualization is getting important to enable multiple use cases in automotive and industrial market for efficient use of hardware resources. The high performance computer vision, imaging, deep learning functions are accelerated using dedicated hardware accelerators for power and performance reasons. The typical single threaded design of these HW accelerators poses challenges in sharing in mixed safety critical, secure and virtualized environments. This paper presents a flexible and efficient sharing scheme for these environments without modifying the underlying HW accelerators. The proposed solution consists of a programmable MCU and additional HW wrappers to enable isolation for safety, security and virtualization. The solution uses novel techniques namely, trusted and sand-boxed message exchange, dynamic master ID generator, and intelligent firmware to shared multiple HW accelerators using a single MCU. The proposed solution is realized in TI Jaincto 7 SoC. The prototype shows <; 1% degradation on HW accelerator performance. Further, the scheme is flexible enough to support multiple HW accelerators like multimedia, imaging, video and deep learning.