RiCoBiT - A topology for the future multi core processor: A concept analysis and review of literature
Jude Abishek Satish, Hussam Taqhi, Harsh Mishra, P. Chetana Reddy, V. Sanju · 2020 International Conference on Smart Technologies in Computing, Electrical and Electronics (ICSTCEE) · 2020
A Network On Chip (NOC) is a network-based technology that is used for intercommunication of data packets between the various modules present on a System On Chip (SOC). Originally, for this purpose, a simple Bus architecture was used which proved to be very inefficient in terms of latency and throughput. Other topologies like Mesh, 2D Torus, too proved inefficient when compared to the RiCoBiT architecture. This paper reviews the architecture of the novel RiCoBiT topology and assesses it in terms of maximum hop count, average hop count, interfaces, throughput and latency. These simulation results are compared with the previously present architectures like the 2D Mesh, Torus and are found to be more optimal in terms of scalability and efficiency of network communication.