Comparison of FPGA Implemented Sobel Edge Detector and Canny Edge Detector

Yong Hyeon Kwon, Jae Wook Jeon · 2020

Result of image processing in computer vision varies with algorithms. In this study, we compare FPGA implemented Sobel edge detector and Canny edge detector. We design edge detectors with Verilog HDL and program Xilinx Vertex-7 FPGA. The goal of this study is to compare output result and resource usage of both edge detection algorithm.

Read the paper · More papers on PaperTik