High Speed Half-Precision Floating-Point Fused Multiply and Add Unit Using DSP Blocks
S. Sankar Ganesh, J. Jean Jenifer Nesam, Umashankar Subramaniam · 2020
Necessity of multiplication followed by the addition in numerous digital signal processing applications demands Fused Multiply and Add (FMA) unit for computations. This FMA design performs [(A ×B) + C] computation as a single operation. The FPGA-based 16-bit half-precision FMA (fp16-FMA) design using in-built DSP blocks for performing integrated multiplication and addition is presented in this paper. The presented design is verified on Xilinx-FPGA Virtex-5 and Virtex-7 series and is compared with best reported 16-bit Floating-point FMA designs. The experimental results reveal that the new fp16-FMA achieves 67% delay reduction compared to Floating-Point Core (FloPoCo) generator-based FMA design. Finally, the amicability of the fp16-FMA in imaging is validated using image RGB to Y color space conversion.