Low Power 32-bit Synchronous and Reconfigurable ALU Design using Chain Structure
Deepali Deepali, Indu Saini, Mamta Khosla · 2020
Low power consumption is one of the leading design challenges while implementing any digital circuit. In platforms like wireless sensor networks where sensor nodes, located at various remote locations, are battery operated this challenge becomes more critical. Due to the lesser access to the deployment site, it is possible neither to change the battery nor to reconfigure the hardware to change the functionality of the deployed sensor node. Our approach of designing an ALU (Arithmetic and logic unit) with different arrangement and selection of elements than that conventionally used results in low power consumption (reduced by > 50%) without effecting the design complexity, total speed of operation and functionality. Additionally, the system is implemented on ZedBoard zynq evaluation and development kit so that the additional changes can be done on the hardware simply by modifying the HDL (Hardware description language) code.