Real Vulnerabilities in Partial Reconfigurable Design Cycles; Case Study for Implementation of Hardware Security Modules
Hanieh Jafarzadeh, Ali Jahanian · 2020
In this paper, the security of existing DPR design flows are analyzed, and some practical vulnerabilities are introduced by an attack scenario in which the adversary exploits the remote DPR capability of the FPGA to launch Hardware Trojan Horse (HTH) attacks on FPGA-based Hardware Security Module (HSM). Our analyses show that there are serious potential vulnerabilities in current reconfigurable FPGA design flows, which should address in architecture level instead of the design flow. The result of this analysis can help FPGA vendors or designers to protect the FPGA-based IPs against dynamic Trojan insertion.