AxFTL: Exploiting Error Tolerance for Extending Lifetime of NAND Flash Storage
Yongwoo Lee, Jaehyun Park, Junhee Ryu, Younghyun Kim · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2020
NAND flash storage has become a standard choice in consumer electronics and is gaining popularity in enterprise systems due to its superior performance and low-power consumption. While its cost disadvantage is rapidly fading thanks to multibit cell technologies and 3-D stacking architectures, the challenge of limited endurance is still lingering and is expected to become more daunting as bits-per-cell continues to increase. In this article, we propose a novel flash translation layer (FTL) design named AxFTL (Approximate FTL) that extends the lifetime of NAND flash storage for error-tolerant applications. For error-tolerant data, AxFTL adopts shallow erase that lowers erase voltage to reduce the erase-induced wearing at the cost of an increased error rate. AxFTL manages multiple groups of blocks by error rates and allocates them according to the error tolerance of write requests. The key components of AxFTL include error tolerance-aware garbage collection and wear leveling schemes that manage the blocks with different error rates with minimal overhead. We implement AxFTL in an SSD simulator for the evaluation of the lifetime improvement and the actual allocation of the blocks. For application-level evaluation, we apply AxFTL to compressed video storage and evaluate the quality of video playback. Our experimental results show that AxFTL greatly improves the lifetime of NAND flash storage by 61% while maintaining a high structural similarity (SSIM) of 0.86 as compared to the conventional FTL.