Empirical Analysis of the I/O Characteristics of a Highly Integrated Many-Core Processor
Cheongjun Lee, Jaehwan Lee, Donghun Koo, Chungyong Kim, Jiwoo Bang, Eun-Kyu Byun, Hyeonsang Eom · 2020
Optimized for parallel operations, Intel's second-generation Xeon Phi processor, code-named Knights Landing (KNL), is actively utilized in high performance computing systems based on its highly integrated cores and high-bandwidth on-package memory, Multi-Channel DRAM (MCDRAM). Recently, the emergence of data-intensive applications and the utilization of many-core processors have further increased the I/O performance requirements of high performance computing systems. Therefore, it is necessary to understand and analyze the I/O characteristics of many integrated core systems. In this paper, we experimentally analyze the I/O characteristics of KNL, focusing on single-thread, buffered-write operations. We determine that KNL has a bottleneck in its buffered write operation that utilizes page cache. To find this bottleneck point and identify its cause, we conduct the experiments in two different ways. First, we measure the execution time of the kernel functions through the kernel I/O path. Second, we measure the occurrence count of system events such as cache-misses and branch-misses. With results from the experiments, we discuss the characteristics on KNL's I/O performance involving the performance bottlenecks.