Serial-Serial AES as Custom Hardware Interface using NIOS II Processor
Amal Hafsa, Anissa Sghaier, Mohsen Machhout, Jihene Malek · 2020
The use of embedded systems has grown widely recently. To ensure their security, cryptographic algorithms were involved to protect information's transfer against attacks. In this paper, a Serial-Serial AES for embedded system with optimized MixColumns and SubBytes transformations is designed. The proposed AES is interfaced as a custom hardware with the System designed around NIOS II processor via GPIOs (General-Purpose Input-Output). The NIOS II processor; is worn to assure the flexibility and facility of custom hardware interface. The Customizable AES is controlled through the NIOS II. The AES as custom hardware ameliorates the speed of data encryption, serves as accelerator, eases the considerable decrease in thermal power dissipation and therefore improves the performance of the whole of system.