The Ultimate DataFlow for Ultimate SuperComputers-on-a-Chips.
Veljko M. Milutinović, Miloš Kotlar, Ivan Ratković, Nenad Korolija, Miljan Djordjevic, Kristy Yoshimoto, Erik Klem, Mateo Valero · arXiv (Cornell University) · 2020
This article starts from the assumption that near future 100BTransistor SuperComputers-on-a-Chip will include N big multi-core processors, 1000N small many-core processors, a TPU-like fixed-structure systolic array accelerator for the most frequently used Machine Learning algorithms needed in bandwidth-bound applications and a flexible-structure reprogrammable accelerator for less frequently used Machine Learning algorithms needed in latency-critical applications.