Design of a teaching computer with floating point unit for Computer Architecture
Andrés Gersnoviez, María Brox, Carlos Castillo-Marquez, Miguel A. Montijano-Vizcaino, Manuel Agustín Ortiz-López, Francisco Javier Quiles-Latorre · 2020
The computer used in Computer Architecture practices of Computer Engineering at the University of Cordoba does not allow the development of floating-point instructions. As several arithmetic algorithms developed in floating-point are taught in the subject, the design of a new computer that includes an arithmetic-logical unit (ALU) capable of implementing them is presented in this paper. The work describes the structure of the new computer, the floating-point number format chosen and the correct implementation of different floating-point algorithms. The new computer allows that students understand in a more optimal way the theoretical concepts taught about floating-point arithmetic.