Cyclic Convolution Based on Fermat Number Transform (FNT) with Low Power and High Speed for Parallel Architecture
T. Jyothsna, M. Pradeep · International Journal Of Recent Advances in Engineering & Technology · 2020
The low power high speed parallel archtechture for cyclic convolution based on fermet number transform (FNT) operated at ultra low voltages are presented.thepower consumption, Delay and Area of this new novel 4-2 Compressor Architecture is compared with Existing architecture.Therefore the proposed 4-2 compressor architectures shows better performance In the proposed architecture the outputs are efficiently used to improve Low power, high speed, performance,and less delay.FNT is exact with no round off errors and Truncation errors.The Binary Arithmetic in FNT performs the Exact Computation.To perform the cyclic convolution in FNT some techniques are implemented.To perform the (FNT) and (IFNT) the techniques used are code Conversion method without Addition (CCWA) and Butterfly Operation without Addition (BOWA).Here the Point wise Multiplication in the Convolution is accomplished by Modulo 2^n+1 Partial Products Multipliers (MPPM) and Output partial products which are Inputs to the IFNT.Thus Modulo 2^n+1 Carry save Propagation Additions are avoided in the FNT and the IFNT except their final stages and the Modulo 2^n+1 multiplier.Thus the Power and Execution delay of the entire FNT will be reduced which is only because of usage of above techniques in the Design.This will be done by using Very Large Scale Integration (VLSI) technology.The synthesis results using 180nm SOC Technology is been used.Therefore the proposed one has less Power better Throughput Performance and involves less hardware complexity.