Efficient Hardware Implementation of Discrete Wavelet Transform Based on Stochastic Computing
Sayed Ahmad Salehi, Dhruba Durjoy · 2020
Stochastic Computing (SC) provides cost-efficient and fault-tolerant computing circuits and has been used for implementing different algorithms. This paper studies the hardware-efficient implementation of discrete wavelet transform (DWT) with SC, for the first time. We design SC circuits using both lifting scheme (LS) and filter bank (FB) models of DWT. We present our approach for CDF 5/3 and CDF 9/7, two DWTs used for JPEG 2000, and discuss some circuit-level optimizations to improve the hardware-efficiency and computational accuracy of the proposed circuits. The FPGA implementation results show that, compared to binary computing, SC achieves remarkably better performance in terms of area, power, speed and fault tolerance.