DESIGN AND IMPLEMENTATION OF AREA EFFICIENT HYBRID PPA ADDER ARCHITECTURE
Miranjikatta Avinash Reddy Medagam · Journal of Critical Reviews · 2020
In this paper the design and implementation of Hybrid PPA adder architecture is implemented. Basically, adders are most commonly used in the applications of digital signal processings, Microprocessors etc. The Hybrid PPA divides the operation into three stages, pre processing stage, carry generation stage and output stage. In pre processing stage, propagator and generator signals are generated by taking inputs A and Input B. In carry generation stage black cells and gray cells are generated. At last in output stage obtained values are added.