An Implementation of Digital Parametric Equalizer on STM32 Processor
Thitaphan Jongsataporn, Sorawat Cheevapreecha · 2020
This paper presents design and implementation of digital parametric equalizer. The design method starts with analog filter prototypes consisting of peak filters, low-pass shelving filter, and high-pass shelving filter in the form of transfer function in the s-domain. The bilinear Pascal matrix is used for converting the transfer function in s-domain using bilinear s-z transformation to obtain all three types of digital filter as a transfer function in z-domain. By cascading of these digital filters result in obtaining a digital parametric equalizer. The simulation results are shown and hardware implementation on STM32F769 for real-time testing is also demonstrated to ensure the successfully of the proposed design and implementation.