An Interval-based Mapping Algorithm for Multi-shape Tasks on Dynamic Partial Reconfigurable FPGAs
Tingyu Zhou, Tieyuan Pan, Michael Conrad Meyer, Yiping Dong, Takahiro Watanabe · 2020
The Dynamic Partial Reconfiguration (DPR) feature of reconfigurable devices allows multiple tasks to be implemented on a single device simultaneously. However, a task mapping problem emerges with the parallelism of the FPGA, especially in a real-time system, a task mapping position has to be quickly determined with a requirement of efficient usage for limited FPGA resources. Traditional task mapping algorithms simplify the task as a rectangular shape, which results in the additional internal unused areas, thus wasting a significant portion of FPGA resources. In this paper, a task mapping algorithm for the multi-shape tasks based on an interval list is proposed. Simulation results demonstrate that the FPGA utilization ratio is improved by at least 10.3% compared with existing algorithms.