A 0.04% BER Strong PUF With Cell-Bias-Based CRPs Filtering and Background Offset Calibration
Jiahao Liu, Yan Zhu, Chi‐Hang Chan, Rui Paulo Martins · IEEE Transactions on Circuits and Systems I Regular Papers · 2020
This paper presents a low bit error rate (BER) strong PUF based on the dynamically amplified subthreshold current array (DA-SCA) with cell-bias-based challenge-response-pairs (CRPs) filtering method. The highly nonlinear subthreshold characteristic of the DA-SCA ensures a strong resilience to machine learning (ML) attacks and it simultaneously achieves low power and compact area. The current difference of two SCAs originated by the manufacturing process is amplified and converted into a voltage difference which is further digitized by the background offset-calibrated oscillator collapse-based comparator. Fabricated in 65 nm CMOS LP technology, the 64-bit DA-SCA PUF shows an average BER of 4.7% in the worst case for the temperature range of -20 to 80° and a supply variation of ±10%. Moreover, the proposed cell-bias-based CRPs filtering method dramatically suppresses the BER to 0.04% while discarding only 9.5% CRPs. The power consumption of the proposed PUF is merely 2.4 μW at 125 Kb/s and it occupies 0.024 mm2, including the on-chip calibration circuit. The proposed PUF demonstrates resistance against machine learning (ML) attacks across 100K training samples, limiting the prediction accuracy to ~50%.