HLS Based IP Protection of Reusable Cores Using Biometric Fingerprint
Anirban Sengupta, Mahendra Rathor · Letters of the IEEE Computer Society · 2020
Reusable Intellectual property (IP) cores are increasingly being integrated in system-on-chips (SoCs) to reduce the SoC design complexity and satisfy the time to market constraint. However, globalization of design supply chain renders the IP cores such as digital signal processer (DSP) hardware accelerators vulnerable to piracy threat. Additionally, integrated circuits (ICs)/ IPs can be fraudulently claimed by a dishonest user. This letter presents a novel biometric fingerprint based hardware security approach using high level synthesis (HLS) framework to safeguard an IC/ IP against false ownership claim and piracy. The proposed approach embeds the IP vendor's biometric fingerprint into a hardware accelerator in the form of secret security constraints. Results show that the proposed approach outperforms a recent approach in terms of enhanced security.