FPGA area allocation for parallel C applications
VM Sima, Elena Moscu Panainte, Koen Bertels · 2008
Abstract — In this paper we present an FPGA area allocation algorithm for parallel OpenMP application that aim to improve performance for a specific reconfiguration area. The algorithm will be implemented in Delft Workbench, a toolchain developed at TU Delft with focus on reconfigurable architectures. The hardware platform used to gather the experimental results is a Xilinx Virtex II Pro board with a PowerPC 405 processor and an FPGA. Using profiling information and the structure of the application we construct a mathematical model which is then used by a modified ILP (Integer Linear Programming) solver to choose the optimal mapping. I.