HAT: Hardware-Aware Transformers for Efficient Natural Language Processing
Hanrui Wang, Zhanghao Wu, Zhijian Liu, Han Cai, Ligeng Zhu, Chuang Gan, Song Han · 2020
Transformers are ubiquitous in Natural Language Processing (NLP) tasks, but they are difficult to be deployed on hardware due to the intensive computation.To enable low-latency inference on resource-constrained hardware platforms, we propose to design Hardware-Aware Transformers (HAT) with neural architecture search.We first construct a large design space with arbitrary encoder-decoder attention and heterogeneous layers.Then we train a Super-Transformer that covers all candidates in the design space, and efficiently produces many SubTransformers with weight sharing.Finally, we perform an evolutionary search with a hardware latency constraint to find a specialized SubTransformer dedicated to run fast on the target hardware.Extensive experiments on four machine translation tasks demonstrate that HAT can discover efficient models for different hardware (CPU, GPU, IoT device).When running WMT'14 translation task on Raspberry Pi-4, HAT can achieve 3× speedup, 3.7× smaller size over baseline Transformer; 2.7× speedup, 3.6× smaller size over Evolved Transformer with 12,041× less search cost and no performance loss.HAT is open-sourced.Elastic Layer Num in Encoder Elastic Head Num (Self Attention) Elastic Hidden Dim in FFN Encoder Layer 2 Encoder Layer m Elastic Embedding Dim Elastic Head Num (Self Attention) Elastic Hidden Dim in FFN Elastic Embedding Dim Elastic Head Num (En-Decoder Attention) Decoder Layer n Elastic Layer Num in Decoder Arbitrary Encoder-Decoder Attention concat ❶ Train a SuperTransformer by uniformly sampling SubTransformers with weight sharing 12/3/