DSM: A Case for Hardware-Assisted Merging of DRAM Rows with Same Content
Seyed Armin Vakil Ghahani, Mahmut Kandemir, Jagadish Kotra · 2020
The number of cores and the capacities of main memory in modern systems have been growing significantly. Specifically, memory scaling, although at a slower pace than computation scaling, provided opportunities for very large DRAMs with Terabytes (TBs) capacity. Consequently, addressing the performance and energy consumption bottlenecks of DRAMs is more important than ever.