AI Chips on Things for Sustainable Society: A 28-nm CMOS, Fully Spin-to-spin Connected 512-Spin, Multi-Spin-Thread, Folded Halved-Interaction Circuits Method, Annealing Processing Chip
Satoshi Kitamura, Ryoma Iimura, T. Kawahara · 2020
For sustainable society, next-generation Internet of Things (IoT) requires ultra-low-power information processing that is useful for both sensor area expansion and high-speed low-power feature extraction using a new signal processing artificial intelligence (AI) large-scale integration (LSI) chip developed for not only the cloud side but also the “things” side (edge) with an attached sensor. For this purpose, a fully spin-to-spin connected Ising model (annealing processing) AI LSI chip was successfully demonstrated for the first time. Its specifications are as follows: 521 spins, 262,144 interactions (with a halved-interaction circuit method), and 4-bit interaction accuracy. The chip was designed and fabricated using a 28-nm CMOS process. The new circuit technologies confirmed in actual operation of the chip are a block configuration realizing all spin-to-spin interactions, 8-spin-threads (core) method, and folded halved-interaction circuit method.