Design and Implementation of Efficient Cryptographic Arithmetic based on Reversible logic and Vedic Mathematics
Kiran Kumar V G · International Journal of Advanced Trends in Computer Science and Engineering · 2020
Low area, low power and efficient arithmetic operations are the need of the decade.Arithmetic operations like modular operations have wide applications like cryptography where security is also a factor.The portability of a device, power consumed, response time of the system, power dissipation are some of the important aspects that need to be considered while designing a system with complex operations.The best and the most suitable method would be to employ efficient arithmetic algorithms that are the building blocks of complex operations like signal and image processing and DSP.The arithmetic operations include the addition, multiplication, and the modular operations.Vedic methodology and the reversible gates are infused together to work as multipliers and are analyzed.Montgomery modular operation is modified and its efficiency is checked with the different multipliers and the modular reduction algorithms implemented here.The area, timing and power consumed by the algorithms is tabulated and studied.The LUT's, slice registers and IOB's used by the design is tabulated.The tabulated values help the designer to choose an efficient algorithm based on the resources that are available while designing.An algorithm can thus be application specific.All the algorithms are implemented in Xilinx 14.2 with Spartan 6 as the family and in Cadence using 45nm technology.The hardware description language used is Verilog.