Computational Approximate Storage with Neural Network-based Error Patrol of 3D-TLC NAND Flash Memory for Machine Learning Applications
Masaki Abe, Chihiro Matsui, Keita Mizushina, Shun Suzuki, Ken Takeuchi · 2020
This paper proposes Computational Approximate Storage (CAS) for machine learning. Proposed CAS minimizes data movement from CPU/GPU to storage by offloading computation. Moreover, approximate computing is introduced for improvement of performance and power by utilizing error tolerance. To evaluate/control memory errors and thus realize CAS, this paper proposes Neural Network-based Memory Error Patrol (MEP) for 3D-TLC NAND flash memories. MEP is composed of two proposals, State Shift Error Prediction (SSEP) and Error Data Pattern Prediction (EDPP). SSEP predicts where errors occur (location of errors) and how much errors occur (degree of errors). SSEP predicts probability of VTH-down and VTH-up shifted cells and can precisely estimate bit-error rate with 2.6% errors even when affected by inter-chip variations. EDPP predicts physical origins of memory cell errors. Proposed MEP can monitor and control memory cell errors. In addition, MEP realizes the approximate computing of computational storage.