A Hardware-Software Co-designed Low Latency AES-RC4 Cryptosystem
Rucha Dhumne, Suresh Salankar, Raj Vardhan Singh, Priyanka Morghade · 2019
Security of data is a primary need for all the system. The AES-RC4 hybrid cryptosystem gives the combine advantages of Advanced Encryption Standard (AES) To data encryption and decryption, to secure the key used for data encryption-decryption Rivest Cipher 4 RC4 is used. This system is designed using the Co-designed approached where AES and RC4 run on the NIOS II integrated development environment (IDE) soft-core. The implementation is on Cyclone IV FPGA, Rijndael algorithm program supported " NIOS II + FPGA" are able to do better performance in the area of latency where it comparatively uses low resources. The results are analysed in the IDE console window of a personal computer system.