Fault Tolerance Research of Visual Convolutional Neural Networks Based on Soft Errors
Xiaotong Xu, Yuzhuo Fu, Ting Liu, Hongjun You · 2020 IEEE 4th Information Technology, Networking, Electronic and Automation Control Conference (ITNEC) · 2020
Injecting faults to the system architecture layer and studying the upper neural network for fault tolerancehe is difficult and time-consuming. This paper proposes an automatic method covering time and space, which can inject faults into the processor on the Simics simulation platform, simulating soft errors, and then collect the time sequence data of the system architecture layer and the observed node data of visual convolutional neural networks program layer. At the same time, combined with the relevant standards, the GAN classifier is used to calibrate the different fault models after converting time sequence data into time sequence images. Finally, the Bayesian network is used to form the path of fault propagation from the architecture layer to the program layer and the result layer. After intensive fault injection into critical registers, the probability of neural network failure caused by soft errors is effectively stimulated.