Pipeline interleaving design for FIR, IIR, and FFT array processors
ChenLiang-Gee, JehngYeu-Shen, ChiuehTzi-Dar · Signal Processing Systems · 1995
In this paper, a floating point multiply- and-accumulate (FMAC) processor capable of running the FIR, IIR, and FFT algorithms is proposed. This processor executes many independent FMAC operations c...