Analysis of Test Data Tampering Attack on Manufacturing Testing
Reginald Tetteh, Samah Mohamed Saeed · 2020
Manufacturing testing screens out defective chips. However, untrusted test environment raises several security/trust concerns. An attacker can tamper the test data to send defective/malicious chips to the market or reduce yield causing financial losses. In this paper, we investigate the adversarial tampering attack of the test data. We shed light on an untrusted test facility that targets reducing yield and deceiving the designer to spend more money on testing for diagnosis purposes. We assume the presence of design-for-security architectures to protect the Intellectual Property (IP) and hide the test data. We analyze the similarity between corrupted and simulated test data under faults. We show that even if the attacker fails to reverse engineer the original IP netlist or decrypt the test patterns and their responses, she/he can still deceive the designer by flipping few bits of the encrypted test patterns, which results in responses that comply with the simulated responses.