Finite wordlength considerations in the implementation of digital filters
Sridharan, Subramanian · UNSWorks (University of New South Wales, Sydney, Australia) · 2022
Several new approaches to improve the finite wordlength (FWL) perfor mance of digital filter structures are presented.To reduce the coeffi cient wordlength, a new scheme is proposed, in which use is made of the error arising out of quantization of the filter coefficients, to correct the output of the filter.To reduce the state wordlength, a scheme is proposed, in which the state quantization residue is split into two parts (bit-sliced), and processed by separate feedback networks.The correction schemes for coefficients and states can be implemented with less hardware compared to conventional methods of implementing extended precision arithmetic.Furthermore, the inherent parallelism of the pro posed schemes enable high speed implementations.Application of the technique to several different filter structures is demonstrated.Considerable attention is paid to the study of finite wordlength implementation of second order direct form structures.To improve the scaling properties of these structures, a new block floating point arithmetic is proposed.Used in conjunction with residue feedback, this approach gives better roundoff noise properties compared to earlier approaches.It is conjectured from extensive simulation studies that the proposed second order block floating point structure is free of FWL oscillations of all types.The feasibility of implementing high order direct form structures is investigated.A block floating point implementation of a high order direct form structure is proposed, which gives lower roundoff noise and has improved scaling properties compared to the conventional high order implementations.The proposed structure is suitable for multi-processorDouble page numbers here as original print copy implementation.It is shown by means of examples that the implementation could result in a lower roundoff noise than conventional parallel and cascade implementation using second order sub-sections.A low sensitivity implementation using a procedure known as delay replacement, is also studied.This procedure enables low sensitivity implementation of narrow band low pass filters in high order direct form.The resulting structure can be efficiently implemented using dis tributed arithmetic.The application of this approach to the implemen tation of high order digital Kalman filters is also investigated.