Design and Comparison of Power, Area and Delay of 32-bit Reversible MAC unit
R. Pandimeena, A Annapoorani, Kaviya T.D, A Rajalakshimi, R. Dhanagopal · 2020
Multiplier and Adder are the primary components to design a MAC unit. It has two stage of operations; one is to find the product of two numbers and other is adding the product to the other number and stores it in the accumulator. Power, Delay and LUT utilization are the important parameters to decide the performance of a processors. Introducing Reversible logic gates which dissipate less power compared to Conventional logic. Vedic Multiplier is one of the efficient multipliers to decrease the delay and improve the performance. Also, various reversible adders are constructed to add the partial outputs. The proposed work shows the performance of different designs used in a MAC unit using reversible logic.