NVDIMM-C: A Byte-Addressable Non-Volatile Memory Module for Compatibility with Standard DDR Memory Interfaces
Changmin Lee, Wonjae Shin, Dae Jeong Kim, Yu Yongjun, Sung-Joon Kim, Taekyeong Ko, Seo Deokho, Jong-Min Park, Kwang-Hee Lee, Seongho Choi, Namhyung Kim, G Vishak, Arun George, V Vishwas, Donghun Lee, Kangwoo Choi, Song Changbin, Kim Dohan, Insu Choi, Ilgyu Jung · 2020
Currently, there are two representative non-volatile dual in-line memory module (NVDIMM) interfaces: a proprietary Intel DDR-T and the JEDEC NVDIMM-P, which are not supported by existing platforms. Adoption of new platform is costly and measuring its efficiency of migrating to the new platform is much more complex. This study is an alternative way of them—finding a new memory device that can be supported by all existing systems. In this paper, we propose an NVDIMM architecture with several system-wide mechanisms to allow the synchronous DDR4 memory interfaces to support non-deterministic (asynchronous) timing. The proposed memory architecture is implemented as a real device prototype, and also evaluated using synthetic and real workloads on an x86-64 server system.