An Analytical Model of Memory-Bound Applications Compiled with High Level Synthesis
Maria A. Dávila-Guzmán, Rubén Gran Tejero, María Villarroya-Gaudó, Darío Suárez Gracia · 2020
HLS tools simplify programming for FPGAs, but generating highly tuned code still remains a challenge because CPU and GPU optimization techniques are not always directly applicable to FPGA. Besides, bitstream generation takes a long time, preventing any “trial-and-error” optimization process. To address this issue, programmers can follow two alternatives. Either they write well-known code patterns from previous explorations, or they rely on pre-synthesis analytical models for estimating performance