FPGA Chaotic Memory Indexing Image Steganography
Abdelrahman M. Ghidan, Peter Wagih Zaki, Samar Moustafa Ismail · 2019
In this paper, two lossy image steganography techniques are introduced based on generalized chaotic logistic maps. The chaotic maps are used for memory indexing employing two different methods. The first method uses only one chaotic map for one dimensional memory indexing, while the second method uses two maps for two dimensional memory indexing. The maps' iterative outputs are pseudorandom numbers used for pixel's position selection. The generalization of logistic maps adds extra degrees of freedom in designing different chaotic behaviors enhancing the security levels of the proposed methods. Several performance metrics are employed to compare between both methods. The hardware designs of the two methods are presented and implemented on Xilinx Virtex 7 FPGA, achieving frequency of 350MHz.