Loop Transformation Algorithm for Test Vector Accessing at High Speed
Bjørn Erik Dahlberg, Martin Versen · Proceedings - International Symposium for Testing and Failure Analysis · 2019
Abstract Looping on test vectors is a widespread requirement in failure analysis of semiconductor devices. The start of the loop and the number of vectors in the loop can be of critical importance. Present-day vector memory architecture tends to impose restrictions on both due to test speed requirements. A new Vector Loop Transformation algorithm is introduced to remedy the tester constraints.