RF/IF hardware design -- implementing the AD607 receiver subsystem for BPSK demodulation
Halil I. Ozbas, Matthew Justin Pilotte · Digital WPI · 2001
The goal of this project was to build a circuit specifically to demodulate a 500MHz binary-phase shift keyed (BPSK) input using the AD607, a low power receiver/IF (intermediate frequency) subsystem designed and built by our project sponsor Analog Devices. The circuit was implemented by utilizing features of the AD607 as well as modifying its design with external components to produce a Costas Loop. To achieve this goal it was necessary to complete three main tasks: simulate the design in software, construct the hardware, and test the results to meet the appropriate specifications.