Hardware-Oriented Fast CU Size and Prediction Mode Decision Algorithm for HEVC Intra Prediction
Yanling Xu, Xin Huang · 2019
To achieve higher coding efficiency, High Efficiency Video Coding (HEVC) introduces a quadtree-based coding structure and provides 35 prediction modes in intra prediction. As a result, HEVC can reduce about 50% bit-rate compared with H.264/AVC. However, the higher efficiency is along with higher complexity. Computational complexity increases at least 2 times in HEVC which makes it difficult for hardware implementation, especially for some real-time encoders. In this paper, a hardware-oriented fast algorithm is proposed to reduce computational complexity for HEVC intra prediction. Firstly, an improved discretization total variation (IDTV) computation process will be executed for a largest coding unit (LCU). With the IDTV, coding unit (CU) partition can be early terminated if the IDTV is lower than or equal to a predefined threshold. The intermediate result directional variations (DVs) are utilized to construct the candidate mode list before the Rough Mode Decision (RMD) starts. We also adjust the number of best modes after the RMD stage to go through Rate-Distortion Optimization (RDO). The experiment results show that the proposed algorithm can save about 34.2% encoding time and increase only 0.52% Bjontegaard Delta Rate (BD-Rate) [13] on average.