An ASIC Implementation of Successive Cancellation Decoder with Built-In Scan Chain

Lakshmi Manasa Sistla, G. Lakshminarayanan · 2018

Polar codes have created an immense impact in the field of channel coding. Polar codes are mathematically simple with a recursive structure and low complexity, proven to achieve channel capacity for long block lengths. This paper presents a built-in scan chain based Successive Cancellation (SC) Decoder design for polar codes implemented on an ASIC. The addition of mux's for scan chain based testability of 32-bit SC decoder leads to a small cell count and area overhead of nearly 8.9% and 10.7% respectively. The implemented chip of the proposed design is operating at 100MHz for an LLR represented using 5-bit two's complement form.

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