Design and Implementation of BIST
Manoj Patil, H B Sharanabasaveshwar · 2018 International Conference on Electrical, Electronics, Communication, Computer, and Optimization Techniques (ICEECCOT) · 2018
BIST is a system in which test patterns are generated to test the circuit. The circuit that needs to be tested is called circuit under test (CUT). If testing is done manually testing phase becomes more crucial one which consumes maximum amount of time and also not economically feasible when compared to the any other phase while fabricating the device or IC to overcome this problem BIST is used. This paper discusses design and implementation of BIST for testing the four bit combinational logic circuit and also the calculation golden signature value. The system consists of LFSR (Linear Feedback Shift Register), CUT (Circuit under Test), signature analyzer and a comparator. LFSR is a pattern generator which generates 2n-1combinations of test patterns, which are then applied to the CUT at the negative rising edge of the CLK. The output of the CUT is applied to the signature analyzer at positive edge of CLK1. Comparator compares the output of the signature analyzer with the golden signature value. If the output of comparator is equal to one, it implies that CUT is fault free if not there is fault present in CUT. Signature analyzer generates two distinct signature values for fault free CUT and faulty CUT.