Quantitative 3-D Model to Explain Large Single Trap Charge Variability in Vertical NAND Memory
Devin Verreck, Antonio Arreghini, J.P. Bastos, F. Schanovsky, F. Mitterbauer, Christian Kernstock, Markus B. Karner, R. Degraeve, Geert Van den Bosch, Arnaud Furnemont · 2019
We present a TCAD model that reproduces large single trap VT-shifts (>100mV) in 3-D NAND flash read current by means of targeted charge placement based on linear response. With this model, we investigate worst-case VT-shifts in terms of bias conditions and junction position, showing low local carrier density at the origin of large shifts. We outline a sampling strategy that allows to reproduce experimental distributions for realistic grain size (12nm) and highlight the role of transconductance to explain anomalous large shifts.