High Speed Controllable Inverter for Adder-Subtractor in QCA
Marshal Raj, Raja Sekar Kumaresan, G. Lakshminarayanan · 2019
The leakage current issues faced by CMOS has led to the rise of beyond-CMOS technologies. Quantum-dot Cellular Automata (QCA) is one of the promising nanotechnology paradigm among the post-CMOS technologies. Adders and Subtractor play a pivotal role in almost all signal processing and arithmetic circuits. A unified hardware that can perform both addition as well as subtraction is generally preferred to separate adder and subtractor circuits. The unified hardware comprises of a controllable inverter and an adder circuit. To design a high speed adder-subtractor, a high speed controllable inverter is required. In this work, a high speed controllable inverter is proposed to increase the speed of operation of adder-subtractor in QCA. The proposed Controllable inverter has fewer cells, area and delay compared to the existing state-of-the-art designs. All the simulation are done using the Coherence vector simulation engine in QCADesigner 2.0.3.