OpenCL-enabled High Performance Direct Memory Access for GPU-FPGA Cooperative Computation
Ryohei Kobayashi, Norihisa Fujita, Yoshiki Yamaguchi, Taisuke Boku · 2019
Field programmable gate arrays (FPGAs) have gained attention in high-performance computing (HPC) research because their computation and communication capabilities have dramatically improved in recent years as a result of improvements to semiconductor integration technologies that depend on Moore's Law. In addition to FPGA performance improvements, OpenCL-based FPGA development toolchains have been developed and ofered by FPGA vendors, which reduces the programming efort required as compared to the past. These improvements reveal the possibilities of realizing a concept to enable on-the-fly offloading computation at which CPUs/GPUs perform poorly to FPGAs while performing low-latency data movement. We think that this concept is one of the keys to more improve the performance of modern heterogeneous supercomputers using accelerators like GPUs. In this paper, we propose a high-performance GPU-FPGA data communication using OpenCL and Verilog HDL mixed programming in order to make both devices smoothly work together. OpenCL is used to program application algorithms and data movement control when Verilog HDL is used to implement low-level components for memory copies between the two devices. Experimental results using toy programs showed that our proposed method achieves a latency of 0.6 μs and as much as 6.9 GB/s between the GPU and the FPGA, thus confrming that the proposed method is efective at realizing the highperformance GPU-FPGA cooperative computation.