A 14-GHz 8-bit Direct Digital Synthesizer in InP DHBT Technology
Xiaopeng Li, Yi Zhang, Zhigong Wang, Youtao Zhang, Min Zhang, Wei Cheng, Hao Gao · 2019
This paper describes a 14-GHz 8-bit direct digital synthesizer(DDS)which is implemented using a 0.7-μm InP double hetero-junction bipolar transistor (DHBT) process. The DDS presented uses a sin-weighted nonlinear DAC to achieve a phase-to-amplitude ROM-less architecture which can make the best of speed advantage of the InP DHBT process for medium to large scale mixed signal integrated circuits. A simplified pipelined phase accumulator is used to reduce power consumption. The average value of SFDR of the output signal of the DDS in the Nyquist bandwidth is -24.8 dBc. The circuit integrates 2122 transistors, consumes a power of 2.4-W, and has a Figure of Merit (FOM) of 5.83GHz/W.