Implementation of pseudo-linear feedback shift register-based physical unclonable functions on silicon and sufficient Challenge–Response pair acquisition using Built-In Self-Test before shipping
Yasuhiro Ogasahara, Yohei Hori, Toshihiro Katashita, Tomoki Iizuka, Hiromitsu Awano, Makoto Ikeda, Hanpei Koike · Integration · 2019
We implemented pseudo-linear feedback shift-register-based physical unclonable functions (PL-PUFs) on silicon and analyzed their performances in terms of reproducibility, uniqueness, and resistance to machine-learning attacks. A PL-PUF is compact and high-throughput PUF, slightly oversensitive to voltage fluctuations. To overcome this drawback, we developed a capturing signal generation circuit that was tolerant to the reproducibility degradation caused by supply voltage changes. We also implemented a Built-In Self-Test (BIST) circuit with an irreversible destruction mechanism to enable exceedingly fast challenge–response pairs (CPRs) for the PUFs before shipping. After the CPRs were evaluated, the BIST circuit became invulnerable to exploitation by attackers.