Accelerator Architecture for Simulated Quantum Annealing Based on Resource-Utilization-Aware Scheduling and its Implementation Using OpenCL
Hasitha Muthumala Waidyasooriya, Yusuke Araki, Masanori Hariyama · 2018
Quantum annealing (QA) is used to find the global optimum for combinatorial optimization problems. QA can be simulated on a computer using quantum Monte Carlo (QMC) simulation while spending a huge processing time. We propose a custom architecture to accelerate simulated QA. The proposed architecture is implemented using “open computing language (OpenCL)” on an Intel Aria10 FPGA. It is possible to design the most appropriate architecture for different optimization problems by changing the design parameters of the OpenCL code. We achieved over 1.94 times speed-up compared to CPU-based implementation.