A Real-Time Fast Ethernet Transceiver achieving Sub-ns Time Synchronization
Simon Buhr, Martin Kreißig, Frank Ellinger · 2019
This work demonstrates sub-ns time synchronization implemented in a real-time Fast Ethernet physical layer (PHY) chip. The chip is fabricated in a 180 nm technology of GLOBALFOUNDRIES. The PHY supports timestamping of ingress and egress frames with a resolution of 500 ps. Measurement results demonstrate the synchronization between two PHYs connected by up to 100 m long category 5 unshielded twisted pair cables. The time difference has a standard deviation of only 176 ps and a mean offset of 50.4 ps. Asymmetries in the cable are compensated by a simple calibration algorithm that is run at startup of the link within 1s.